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Operating System :: POSIX :: Linux [Remove This Filter]
7 projects in result set.
1. MetroGrid - This project will provide a metrology platform for Grid5000, to analyse network trafic in grid environment. It will allow to check grid network trafic characteristics, and to analyse experiments flows comportment.
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Register Date: 2007-06-08 13:30 |
2. SYNTOL - Syntol is a prototype scheduler for CRP, an extension of C in which one can define statically interconnected parallel processes.
| - Development Status: 3 - Alpha [Filter]
- Environment: Console (Text Based) [Filter]
- Intended Audience: Developers [Filter]
- License: CeCILL [Filter]
- LIP research teams: Compsys [Filter]
- Natural Language: English [Filter]
- Operating System: Linux (Now Filtering)
- Programming Language: Other [Filter]
- Topic: Compilers [Filter]
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Register Date: 2007-04-05 17:58 |
3. Advanced Optorsim - AdvancedOptorsim is a grid simulator dedicated to data management.
| - Development Status: 3 - Alpha [Filter]
- Environment: Console (Text Based) [Filter]
- Intended Audience: Developers [Filter] , End Users/Desktop [Filter]
- LIP research teams: GRAAL [Filter]
- Operating System: Linux (Now Filtering)
- Programming Language: Java [Filter]
- Topic: Scientific/Engineering [Filter]
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Register Date: 2007-02-26 16:48 |
4. Ugh: version Compsys - Archive CVS pour Compsys du logiciel UGH développé au LIP6.
| - Development Status: 3 - Alpha [Filter]
- Environment: Console (Text Based) [Filter]
- Intended Audience: Developers [Filter]
- License: GNU General Public License \(GPL\) [Filter]
- LIP research teams: Compsys [Filter]
- Natural Language: English [Filter]
- Operating System: Linux (Now Filtering)
- Programming Language: C [Filter]
- Topic: Compilers [Filter]
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Register Date: 2005-10-28 18:59 |
5. Higher-Order Table-Based method - VHDL generator for function evaluation operators using the Higher-Order Table-Based Method (HOTBM).
| - Development Status: 4 - Beta [Filter]
- Environment: Console (Text Based) [Filter]
- Intended Audience: Developers [Filter]
- License: GNU General Public License \(GPL\) [Filter]
- LIP research teams: Arénaire \(computer arithmetic\) [Filter]
- Natural Language: English [Filter]
- Operating System: Linux (Now Filtering)
- Programming Language: C++ [Filter]
- Topic: Electronic Design Automation (EDA) [Filter]
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Register Date: 2005-03-04 12:55 |
6. Divgen - Divgen is a divider generator. It generates synthesizable VHDL descriptions of division units. Various algorithms, representations, radices, and parameters are supported.
| - Development Status: 4 - Beta [Filter]
- Environment: Console (Text Based) [Filter]
- Intended Audience: Developers [Filter] , End Users/Desktop [Filter]
- License: GNU General Public License \(GPL\) [Filter]
- LIP research teams: Arénaire \(computer arithmetic\) [Filter]
- Natural Language: English [Filter]
- Operating System: Linux (Now Filtering)
- Programming Language: C++ [Filter]
- Topic: Electronic Design Automation (EDA) [Filter]
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Register Date: 2004-08-31 11:18 |
7. PAPIER - PVS Automatic proofs for intervals and rationals
| - Development Status: 1 - Planning [Filter]
- Intended Audience: Developers [Filter]
- License: CeCILL [Filter]
- LIP research teams: Arénaire \(computer arithmetic\) [Filter]
- Operating System: Linux (Now Filtering)
- Topic: Mathematics [Filter]
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Register Date: 2004-10-08 13:47 |
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