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5 projet(s) trouvé(s).
1. MetroGrid - This project will provide a metrology platform for Grid5000, to analyse network trafic in grid environment. It will allow to check grid network trafic characteristics, and to analyse experiments flows comportment.
 
  • Development Status: 2 - Pre-Alpha [Filter]
  • Environment: Console (Text Based) [Filter] , Web Environment [Filter]
  • Intended Audience: Developers (Now Filtering)
  • License: GNU General Public License \(GPL\) [Filter]
  • LIP research teams: RESO [Filter]
  • Natural Language: English [Filter] , French [Filter]
  • Operating System: Linux (Now Filtering)
  • Programming Language: C [Filter] , PHP [Filter]
  • Topic: Monitoring [Filter]
Activity Percentile: 0.00
Activity Ranking: 0.00
Register Date: 08/06/2007 13:30

2. SYNTOL - Syntol is a prototype scheduler for CRP, an extension of C in which one can define statically interconnected parallel processes.
 
  • Development Status: 3 - Alpha [Filter]
  • Environment: Console (Text Based) [Filter]
  • Intended Audience: Developers (Now Filtering)
  • License: CeCILL [Filter]
  • LIP research teams: Compsys [Filter]
  • Natural Language: English [Filter]
  • Operating System: Linux (Now Filtering)
  • Programming Language: Other [Filter]
  • Topic: Compilers [Filter]
Activity Percentile: 0.00
Activity Ranking: 0.00
Register Date: 05/04/2007 17:58

3. Ugh: version Compsys - Archive CVS pour Compsys du logiciel UGH développé au LIP6.
 
  • Development Status: 3 - Alpha [Filter]
  • Environment: Console (Text Based) [Filter]
  • Intended Audience: Developers (Now Filtering)
  • License: GNU General Public License \(GPL\) [Filter]
  • LIP research teams: Compsys [Filter]
  • Natural Language: English [Filter]
  • Operating System: Linux (Now Filtering)
  • Programming Language: C [Filter]
  • Topic: Compilers [Filter]
Activity Percentile: 0.00
Activity Ranking: 0.00
Register Date: 28/10/2005 18:59

4. Divgen - Divgen is a divider generator. It generates synthesizable VHDL descriptions of division units. Various algorithms, representations, radices, and parameters are supported.
 
  • Development Status: 4 - Beta [Filter]
  • Environment: Console (Text Based) [Filter]
  • Intended Audience: Developers (Now Filtering) , End Users/Desktop [Filter]
  • License: GNU General Public License \(GPL\) [Filter]
  • LIP research teams: Arénaire \(computer arithmetic\) [Filter]
  • Natural Language: English [Filter]
  • Operating System: Linux (Now Filtering)
  • Programming Language: C++ [Filter]
  • Topic: Electronic Design Automation (EDA) [Filter]
Activity Percentile: 0.00
Activity Ranking: 0.00
Register Date: 31/08/2004 11:18

5. Higher-Order Table-Based method - VHDL generator for function evaluation operators using the Higher-Order Table-Based Method (HOTBM).
 
  • Development Status: 4 - Beta [Filter]
  • Environment: Console (Text Based) [Filter]
  • Intended Audience: Developers (Now Filtering)
  • License: GNU General Public License \(GPL\) [Filter]
  • LIP research teams: Arénaire \(computer arithmetic\) [Filter]
  • Natural Language: English [Filter]
  • Operating System: Linux (Now Filtering)
  • Programming Language: C++ [Filter]
  • Topic: Electronic Design Automation (EDA) [Filter]
Activity Percentile: 0.00
Activity Ranking: 0.00
Register Date: 04/03/2005 12:55

 

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